This simply does not and cannot apply in the ethernet domain. There might well be "edges" in digital signals after the streamer because the concept of edges involves timing, but there are no edges in ethernet data packets as there is no timing.
OMG Nigel!
What you say there could not be further from the truth!
(Setting aside the fact that someone quoted out of context the tutorial section of a paper of ours and that my own points about phase-noise induced ground-plane noise is one again being ignored by you.)
Ethernet is ALL about timing, data edges, and clocking!
I am short on time, hungry, and my back hurts, so I'll just be lazy and post this concise summary on the matter from my preferred AI (Perplexity):
--Alex C.
P.S. Don't forget that my partner John Swenson spent his career deep in design of actual ASICs and Ethernet switch chips and Ethernet and USB PHY chips. Some famous classic Cisco switch series (2960 as I recall) us big parts that he lead the design of.
Timing and Data Edges in Ethernet Packets
Timing and
data edges are fundamental in how Ethernet hardware transmits and receives data. Here’s how these concepts relate specifically to Ethernet packets:
Timing in Ethernet
Timing in Ethernet refers to the precise synchronization required for sending and receiving data packets between devices.
Ethernet uses clock signals to coordinate when data bits are transmitted and sampled. Each packet relies on an accurate timing reference to maintain the correct bit sequence and data integrity.
For example, in interfaces like RGMII (Reduced Gigabit Media-Independent Interface), both rising and falling edges of the clock signal are used—this is called double data rate (DDR) transfer, and it doubles the data throughput because data is sampled on both the rising and falling edges of the clock. Timing is particularly critical here, with clock delays (usually 1.5ns to 2ns in RGMII) required to align the data and clock signals.
At the physical layer (PHY), packet arrival can happen at any instant, and the receiver must quickly synchronize and align itself to the timing of incoming edges, typically using an interrupt triggered by the edge on the input data line.
Data Edges
Data edges refer to the transitions in the physical electrical signal—either from low to high voltage (rising edge) or from high to low (falling edge)—which represent digital data bits in Ethernet signaling.
These edges are crucial for:
Clock Recovery: The receiver often uses these edges to re-synchronize its internal clock, using features like phase-locked loops (PLLs).
Data Sampling: The exact moment when data is considered valid is generally aligned with specific clock edges (either rising, falling, or both, as in DDR interfaces).
When a transmitter sends Ethernet data, it puts each bit on the wire in sync with a clock. The receiver must detect data edges (transitions) and use them to sample the correct data values for each bit.
For 10BASE-T Ethernet, the initial preamble signal (a regular sequence of data edges) helps the receiver lock onto the timing before actual data arrives—missing these initial edges means the packet cannot be correctly processed.
[2]
Importance for Data Integrity
Packet boundaries are also detected using timing and data edges. For instance, the preamble and start frame delimiter in Ethernet help the receiver detect exactly
when the packet starts.
Edge synchronization ensures that both sender and receiver are aligned, minimizing bit errors and maximizing throughput.
Example: RGMII Signaling and Data Edges
In RGMII, data signals (TXD, RXD) are paired with clock lines (TXC, RXC).
Communication happens on both edges (rising and falling) of these clocks, demanding careful layout and sometimes deliberate introduction of delays to ensure setup and hold timing for data is met.
Summary Table
| Concept | Description | Example Usage |
| Timing | Synchronizes sender/receiver for data transmission | Clock signals, preamble sequences, PHY synchronization |
| Data Edges | Electrical transitions denoting bits, aid in sampling | DDR interfaces, preamble for edge detection |
In essence, timing ensures packets are correctly sent and received, while data edges are the physical events that define the digital data within each packet. Improper alignment or detection of either compromises packet integrity and network reliability