Weiss Medea Plus deconstruction thread

[AudioExplorations]

As we have had some very interesting and enlightening DAC deconstruction threads I thought we could do the same for the flagship Weiss DAC, keeping it here in the more general DAC sub forum for increased visibility..

Medea Plus Brochure
Medea Plus Manual

Specs:
DAC ESS9018 32bit with*Mutual Relation Correlation System, utilising 2 x 4 channels
I/V Conversion Fully Balanced 4pc x Discrete OP1-BP mounted on top of DAC chipset
Output Stage Fully Balanced 4pc x Discrete OP1-BP
Output Level Max. +27dBu (17.35V RMS)
Backpanel trimmer -4dBu (0.49v) to +27dBu in 1dB steps
Analogue Topology Fully Discrete/Balanced OP1-BPs*x*8pc
Heat Sink Each Op1-BP independent + 4 output OP1-BPs on 2 larger heat sinks
SNR 132dB A-weighted
DSP Sharc 40bit DSP
DSP Blocks Upsampling / Dejittering
Up-sampling DSP 2x : Oversampling 4x
Sampling rates 352.8kHz (44.1kHz)

Measurements of the Medea+ DAC posted on Kent Poon's Audio blog.

Internal shot of the Medea Plus.


Previous generation Medea showing internals situated underneath the FW card (note the different analogue section).


The new Medea Plus (above) and previous Medea (below) analogue output stages.


The output stage utilizes 8 x Weiss' SOTA OP1-BP high performance discrete bipolar operational amplifiers.

More info: http://designwsound.com/dwsblog/2011/12/medeaop1-bp-board/
OP1-BP brochure
OP1-BP data sheet

 

[Sound Affair]

The question is when will weiss implement DSD 128fs? With the upgraded DAC chip to the ESS 9018 it now has that potential.

 

[Bruce B]

The question is when will weiss implement DSD 128fs? With the upgraded DAC chip to the ESS 9018 it now has that potential.

They would just put in a steep low pass filter at 22k anyway just like their software.

 

[opus111]

I see a custom wound toroid is being used here - with multiple (looks like four) secondaries. Same comments apply as for the Mytek - toroids suck for mains-borne noise rejection. Again, as in the Mytek the mains filter looks to be a generic commercial variety and no additional components have been added to bolster the generic's poor performance.

Equally of a concern here is the use of rectifier bridges with no apparent means of snubbing the rectifier switch-off noise. When I was working in the industry I had a product fail EMC testing because I hadn't realised the bridge I was using radiated noise back down the mains cable. Once bitten, now I always either include rectifier snubbers (series RC networks) to absorb the RF or use discrete soft recovery diodes which don't generate it in the first place. Here neither seem to be deployed.

The wiring to what appears to be the USB input processor board also looks a tad 'ad-hoc' - note the two short black wires soldered to the bottom left corner of this PCB. There are other Heath-Robinson wires spread around - for example the yellow one to bottom right of the same PCB looks just tacked on to an SMT resistor pad on the main board. I commonly do such a thing on my DIY designs for my own use, but I'm a little surprised to see this in a commercial product being offered in the kilobuck range.

<edit> Sorry, for 'USB' read 'Firewire'

 

[LL21]

good read, Opus...not sure i totally understood it (correction: i definitely did NOT totally understand it)...but a good read as i try to learn a bit more. thanks for taking the time.

 

[opus111]

Thanks for the feedback Lloyd - as always questions welcomed for the bits that flew straight over your head!

Its been instructive to me to study how the inside of the Berkeley has been laid out - quite different from this Weiss. On the Weiss there's huge design effort gone into the discrete analog stages but seemingly little effort at a whole system level. The Berkeley though shows signs of system-wide thinking - in terms of the grounding and isolation of the various sub-systems. Pity they didn't use a great DAC chip though because the rest of it is thought through to a much higher standard than most DACs out there nowadays.

 

[AudioExplorations]

Richard, thanks a lot for your perspective. Regarding the noise rejection issues, does this refer to DC in the mains or high frequency noise? I am assuming a power conditioner would mitigate this issue as it would prevent mains based noise from entering the unit in the first place?

Could you comment on the analogue output stage, I assume this is somewhat more robust than what is typically implemented in DACs'? Does this play a significant role in the overall performance?

Also, the way the FireWire has been implemented is that it is essentially a built in INT202 unit (standalone FW->SPDIF converter) that is then routed to one of the SPDIF inputs internally. Does this differ significantly to your traditional asynch implementation (where the USB/FW received is located physically next to the oscillators located physically next to the DAC chip) and what are the consequences of this?

 

[opus111]

Richard, thanks a lot for your perspective. Regarding the noise rejection issues, does this refer to DC in the mains or high frequency noise?

The noise issues I'm blabbing on about are high frequency - ultrasonic and RF. DC isn't something I've considered - the trafo might hum a bit if there's DC on the mains but I don't think the output signal will be affected. The presence of DC on the mains is normally indicative of some kind of lamp dimmer nearby which will also generate plenty of HF hash too.

I am assuming a power conditioner would mitigate this issue as it would prevent mains based noise from entering the unit in the first place?

Yes it would deal with the noise ingress issue, but not with the un-snubbered rectifiers which are generating noise internally.

Could you comment on the analogue output stage, I assume this is somewhat more robust than what is typically implemented in DACs'? Does this play a significant role in the overall performance?

As far as I can see the quality of the analogue stage here is the DAC's strongest card. It looks way above my pay grade to criticize. Yes I would expect it to play a significant role, yet the rest of the engineering in the DAC I doubt is helping all that exemplary analog engineering to give of its best. A chain is only as strong as its weakest link and low-noise electronics doesn't mix up well at all with high levels of RF. However the prime source of the RF seen by the analog stages is the DAC chip itself which is not at all friendly to circuits downstream of it.

Also, the way the FireWire has been implemented is that it is essentially a built in INT202 unit (standalone FW->SPDIF converter) that is then routed to one of the SPDIF inputs internally. Does this differ significantly to your traditional asynch implementation (where the USB/FW received is located physically next to the oscillators located physically next to the DAC chip) and what are the consequences of this?

Ah thanks, that sheds light on why that board looks to be rather a bodge. I have no experience of the Firewire protocol so on this I'll defer to anyone with some experience. It does though strike me as distinctly odd that the only oscillators I can see are some distance from the DAC and output stage - they look to be top left on the digital board, next door to the PSU caps. Which looks to mean that the clocks have to travel over that umbilical ribbon between the two major subsystems (analog and digital). In my estimation this is far from ideal.